In a bipolar element having a pn junction, such as an insulated gate bipolar transistor (IGBT), in order to realize high-speed switching, it is required to precisely control a lifetime of a minority carrier remaining in a substrate in a switching-off state. As one of the methods of precisely controlling a lifetime of a minority carrier, a configuration of introducing a lattice defect layer in a rear side of a substrate has been known.
For example, in a method of manufacturing a semiconductor device, a lattice defect layer is formed by irradiating a proton (H+), a helium (He) ion, or the like to a rear side of a substrate and an annealing process is then executed thereon.
In the method of executing an annealing process after the lattice defect layer is formed, since heat is also applied to the lattice defect layer, there is a possibility that a lattice defect is recovered (becomes extinct). In the annealing process, a heat processing furnace (baking furnace) is generally used. However, in the annealing process using a heat processing furnace, it is difficult to adjust conditions such as temperature or time, and recovery of a lattice defect in the lattice defect layer becomes more pronounced. The recovery in the lattice defect of the lattice defect layer leads to difficulty in controlling a lifetime of a minority carrier, making it difficult to realize high-speed switching.